only read the required number of bytes, per command

On many Lenovo GbE regions (in factory firmware), part 0 is
invalid but part 1 is valid.

This change means part 1 is checked first. If part 1 is valid,
part 0 won't be checked at all (due to how most C compilers
optimise).

Most people are just going to extract the factory GbE file,
modify it and re-insert it into the ROM image, so this causes
a nice speedup.

don't constantly open/close the file: /dev/urandom

only read 12 bytes at a time

because of this change, the readFromFile() function now only
handles gbe files

Massive reduction in number of bytes written, if copy/swap
commands are not used.

Old behaviour: always write both gbe sections.

New behaviour: only write back what was changed.

The USB 2.0 ports on Exynos boards need the relevant driver enabled by
USB_EHCI_EXYNOS. This is enabled by default depending on USB_EHCI_HCD.
It's already enabled on snow and spring, but apparently not on peach
boards, as discovered from other people's attempts to enable it [1][2].
Enable it also on the peach_pi and peach_pit.

[1] https://gitlab.com/exynos5-mainline/u-boot/-/commit/8f12e43dbfdebbd29f49c2cb8bf6e9b6ea7e70c9
[2] https://gitlab.com/exynos5-mainline/u-boot/-/commit/11cacf55ad720dfca8799561a38b1da4732a3018



Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>

The display driver on the veyron boards needs reset drivers, more
specifically RESET_ROCKCHIP. This is enabled by default depending on
DM_RESET, which an upstream commit enables for veyron_jerry claiming it
fixes the display [1]. Enable it also in our configs, but for other
veyrons as well.

[1] https://lore.kernel.org/u-boot/20220928024046.2657593-1-sjg@chromium.org/



Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>

Ferass 'Vitali64' EL HAFIDI authored 2 years ago and Leah Rowe committed 2 years ago

Signed-off-by: Ferass 'Vitali64' EL HAFIDI <vitali64pmemail@protonmail.com>

Ferass 'Vitali64' EL HAFIDI authored 2 years ago and Leah Rowe committed 2 years ago

By making lbmk fully POSIX-compliant, it will be easier to port lbmk to
other systems implementing POSIX such as Alpine Linux and FreeBSD.

Signed-off-by: Ferass 'Vitali64' EL HAFIDI <vitali64pmemail@protonmail.com>

i didn't like the previous commits, they felt really hacky

running malloc and then changing the pointer directly just rubs
me the wrong way

fix that

don't do xor swap. we know gbe2 is always 4KB higher than
gbe in memory, so we can just set gbe2 to the value of gbe,
and OR the size in bytes of 4KB into gbe2

this is only a marginal speed boost, negligible even, but it's
done for the lulz

similar to the last change by concept. we now write
individual 4KB blocks per part 0 and 1, at the end
of nvmutil, based on pointer values gbe and gbe2

instead of running memcpy, simply overwrite the pointer

this results in less I/O, thus more speed

instead of XOR-swapping every byte, have pointers to the
two parts and *XOR swap the pointers*. at the end of the
program execution, when writing, pwrite the two parts into
the same file

due to upstream bloat, these no longer fit. it will have to be
fixed in the next libreboot release

Without this change, arbitrary MAC addresses will always be masked.

This change restores the intended behaviour.

memtest can't fit in such tiny space alongside SeaBIOS

The configs were enabling SeaBIOS payload, but this is to be
handled by lbmk, not coreboot.

Further, they were enabling VGA ROM execution in coreboot, but
this should be handled by SeaBIOS.

This board should not have a GRUB payload enabled either; this
will be checked and fixed if necessary in the next commit.