From b52b93ebadc85fd39f6619fe37f169997b4d41f7 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 20 Oct 2023 18:56:07 -0600
Subject: [PATCH] docs/{hardware,install}/e6430.md: Fix inaccuracies
Most of the issues were just leftover from the E6400 docs which
are not accurate for the E6430.
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
site/docs/hardware/e6430.md | 20 ++++++++++----------
site/docs/install/e6430.md | 31 ++++++++++++++++---------------
2 files changed, 26 insertions(+), 25 deletions(-)
diff --git a/site/docs/hardware/e6430.md b/site/docs/hardware/e6430.md
index 3bafc1e..b8c2fe5 100644
--- a/site/docs/hardware/e6430.md
+++ b/site/docs/hardware/e6430.md
@@ -15,23 +15,23 @@ Dell Latitude E6430
| **Variants** | E6430 with Intel GPU supported |
| **Released** | 2012 |
| **Chipset** | Intel Ivy Bridge |
-| **CPU** | Intel Core i3, i5 or i7 . |
-| **Graphics** | Intel HD 4000 and unsupported NVidia NVS 5200M |
+| **CPU** | Intel Core i3, i5 or i7 |
+| **Graphics** | Intel HD 4000 and unsupported Nvidia NVS 5200M |
| **Display** | 1366x768/1600x900 TFT |
-| **Memory** | 4 or 8GB (Upgradable to 16GB) |
+| **Memory** | 4 or 8GB (Upgradable to 16GB) |
| **Architecture** | x86_64 |
| **EC** | SMSC MEC5055 with proprietary firmware |
| **Original boot firmware** | Dell UEFI |
-| **Intel ME/AMD PSP** | Present. Can be completely disabled. |
+| **Intel ME/AMD PSP** | Present, neutered |
| **Flash chip** | 2xSOIC-8, 12MiB (8MiB and 4MiB in combination) |
```
-W+: Works without blobs;
-N: Doesn't work;
-W*: Works with blobs;
-U: Untested;
-P+: Partially works;
+W+: Works without blobs;
+N: Doesn't work;
+W*: Works with blobs;
+U: Untested;
+P+: Partially works;
P*: Partially works with blobs
```
@@ -43,7 +43,7 @@ P*: Partially works with blobs
| **Audio** | W+ |
| **RAM Init** | W+ |
| **External output** | W+ |
-| **Display brightness** | P+ |
+| **Display brightness** | P+ |
| ***Payloads supported*** | |
|---------------------------|-----------|
diff --git a/site/docs/install/e6430.md b/site/docs/install/e6430.md
index 1fd879c..eb357a9 100644
--- a/site/docs/install/e6430.md
+++ b/site/docs/install/e6430.md
@@ -114,16 +114,17 @@ is included in that program's directory, or you can read it online here:
<https://browse.libreboot.org/lbmk.git/plain/util/dell-flash-unlock/README.md>
-Literally just run that program, and do what it says. You run it once, and shut
-down, and when you do, the system brings itself back up automatically. Then
-you run it and flash it unlocked. Then you run it again. The source code is
-intuitive enough that you can easily get the gist of it; it's writing some EC
-commands and changing some chipset config bits. The EC on this machine is
-hooked up to the `GPIO33` signal, sometimes called `HDA_DOCK_EN`, which sets
-the flash descriptor override thus disabling any flash protection by the IFD.
-It also bypasses the SMM BIOS lock protection by disabling SMIs, and Dell's
-BIOS doesn't set any other type of protection either such as writing to
-Protected Range registers.
+Literally just run that program, and do what it says. You run it once, shut
+down, and then power on the machine. Then run it again to confirm that the
+flash is unlocked. The source code is intuitive enough that you can easily get
+the gist of it; it's writing some EC commands and changing some chipset config
+bits. The EC on this machine is hooked up to the `HDA_SDO` signal, also known
+as the Flash Descriptor Override (FDO), which disables any flash protection by
+the IFD. When booted with the FDO set, the original Dell firmware disables all
+other BIOS write protections such as SMM BIOS lock bits.
+
+*Make sure* to make a backup of the original firmware before proceeding to
+flash; see the instructions below.
When you flash it, you can use this command:
@@ -163,11 +164,11 @@ How to flash externally
Refer to [spi.md](spi.md) as a guide for external re-flashing.
-The SPI flash chip shares a voltage rail with the ICH9 southbridge, which is
-not isolated using a diode. As a result, powering the flash chip externally
-causes the ICH9 to partially power up and attempt to drive the SPI clock pin
-low, which can interfere with programmers such as the Raspberry Pi. See
-[RPi Drive Strength](spi.md#rpi-drive-strength) for a workaround.
+The SPI flash chip shares a voltage rail with the chipset, which is not
+isolated using a diode. As a result, powering the flash chip externally may
+cause the QM77 chipset to partially power up and drive the SPI pins, which can
+interfere with programmers such as the Raspberry Pi. See [RPi Drive
+Strength](spi.md#rpi-drive-strength) for a workaround.
Have a look online for videos showing how to disassemble, if you wish to
externally re-flash.
--
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