super experimental hp elitebook 8560w support

super experimentally dysfunctional port, in libreboot. untested, guaranteed to *not* work, so you should *not* install this, unless you want a royal pain in your a**. thank you. NOTE: the ifd.bin and gbe.bin are fake. just zeroes TODO: put real ones there TODO: support scanning for these in blobutil NOTE: EC not auto-downloaded yet, and not specified in the coreboot configuration file. TODO: important! (add support for this to blobutil) SUPER DUPER NON-FUNCTIONAL AND BROKEN, IN SEVERAL WAYS.

super experimental hp elitebook 8560w support
super experimentally dysfunctional port, in libreboot. untested, guaranteed to *not* work, so you should *not* install this, unless you want a royal pain in your a**. thank you. NOTE: the ifd.bin and gbe.bin are fake. just zeroes TODO: put real ones there TODO: support scanning for these in blobutil NOTE: EC not auto-downloaded yet, and not specified in the coreboot configuration file. TODO: important! (add support for this to blobutil) SUPER DUPER NON-FUNCTIONAL AND BROKEN, IN SEVERAL WAYS.
6f7900d7 · Leah Rowe · 92132e8e · 6f7900d7 · 6f7900d7 · 6f7900d7
Commit 6f7900d7 authored 2 years ago by Leah Rowe
--- a/.gitignore
+++ b/.gitignore
 *~
 /TODO
+/ec/
 /ich9utils/
 /tmp/
 /payload/

--- a/blobs/hp_sandybridge/gbe.bin
+++ b/blobs/hp_sandybridge/gbe.bin
--- a/blobs/hp_sandybridge/ifd.bin
+++ b/blobs/hp_sandybridge/ifd.bin
--- a/resources/blobs/sources
+++ b/resources/blobs/sources
@@ -22,3 +22,12 @@
 	DL_url https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
 	DL_url_bkup https://web.archive.org/web/20211120031520/https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
 }
+
+{hp8560w}{
+	DL_hash 67f854c134d1e32e268107396af1cd5f81fb1a58
+	DL_url https://web.archive.org/web/20170918182523/https://ftp.hp.com/pub/softpaq/sp80001-80500/sp80282.exe
+	DL_url_bkup https://web.archive.org/web/20170918182523/https://ftp.hp.com/pub/softpaq/sp80001-80500/sp80282.exe
+}
+# NOTE (HP): the upstream file hash differs, which means it changed upstream
+# and this upstream doesn't use a new filename. therefore, it's best to use
+# a wayback link for this file. this wayback link is from 2017, which is fine
--- a/resources/coreboot/hp8560w_8mb/board.cfg
+++ b/resources/coreboot/hp8560w_8mb/board.cfg
+cbtree="hp_8560w_cherrypick"
+romtype="normal"
+arch="x86_64"
+payload_grub="y"
+payload_grub_withseabios="y"
+payload_seabios="y"
+payload_memtest="y"
+grub_scan_disk="ahci"
--- a/resources/coreboot/hp8560w_8mb/config/vgarom_txtmode
+++ b/resources/coreboot/hp8560w_8mb/config/vgarom_txtmode
+#
+# Automatically generated file; DO NOT EDIT.
+# coreboot configuration
+#
+
+#
+# General setup
+#
+CONFIG_COREBOOT_BUILD=y
+CONFIG_LOCALVERSION=""
+CONFIG_CBFS_PREFIX="fallback"
+CONFIG_COMPILER_GCC=y
+# CONFIG_COMPILER_LLVM_CLANG is not set
+# CONFIG_ANY_TOOLCHAIN is not set
+# CONFIG_CCACHE is not set
+# CONFIG_FMD_GENPARSER is not set
+# CONFIG_UTIL_GENPARSER is not set
+# CONFIG_OPTION_BACKEND_NONE is not set
+CONFIG_USE_OPTION_TABLE=y
+CONFIG_STATIC_OPTION_TABLE=y
+CONFIG_COMPRESS_RAMSTAGE=y
+CONFIG_INCLUDE_CONFIG_FILE=y
+CONFIG_COLLECT_TIMESTAMPS=y
+# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
+CONFIG_USE_BLOBS=y
+# CONFIG_USE_AMD_BLOBS is not set
+# CONFIG_USE_QC_BLOBS is not set
+# CONFIG_COVERAGE is not set
+# CONFIG_UBSAN is not set
+CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
+# CONFIG_ASAN is not set
+# CONFIG_NO_STAGE_CACHE is not set
+CONFIG_TSEG_STAGE_CACHE=y
+# CONFIG_UPDATE_IMAGE is not set
+# CONFIG_BOOTSPLASH_IMAGE is not set
+# CONFIG_FW_CONFIG is not set
+# end of General setup
+
+#
+# Mainboard
+#
+
+#
+# Important: Run 'make distclean' before switching boards
+#
+# CONFIG_VENDOR_51NB is not set
+# CONFIG_VENDOR_ACER is not set
+# CONFIG_VENDOR_ADLINK is not set
+# CONFIG_VENDOR_AMD is not set
+# CONFIG_VENDOR_AOPEN is not set
+# CONFIG_VENDOR_APPLE is not set
+# CONFIG_VENDOR_ASROCK is not set
+# CONFIG_VENDOR_ASUS is not set
+# CONFIG_VENDOR_BAP is not set
+# CONFIG_VENDOR_BIOSTAR is not set
+# CONFIG_VENDOR_BOSTENTECH is not set
+# CONFIG_VENDOR_CAVIUM is not set
+# CONFIG_VENDOR_CLEVO is not set
+# CONFIG_VENDOR_COMPULAB is not set
+# CONFIG_VENDOR_DELL is not set
+# CONFIG_VENDOR_ELMEX is not set
+# CONFIG_VENDOR_EMULATION is not set
+# CONFIG_VENDOR_EXAMPLE is not set
+# CONFIG_VENDOR_FACEBOOK is not set
+# CONFIG_VENDOR_FOXCONN is not set
+# CONFIG_VENDOR_GETAC is not set
+# CONFIG_VENDOR_GIGABYTE is not set
+# CONFIG_VENDOR_GIZMOSPHERE is not set
+# CONFIG_VENDOR_GOOGLE is not set
+CONFIG_VENDOR_HP=y
+# CONFIG_VENDOR_IBASE is not set
+# CONFIG_VENDOR_INTEL is not set
+# CONFIG_VENDOR_JETWAY is not set
+# CONFIG_VENDOR_KONTRON is not set
+# CONFIG_VENDOR_LENOVO is not set
+# CONFIG_VENDOR_LIBRETREND is not set
+# CONFIG_VENDOR_LIPPERT is not set
+# CONFIG_VENDOR_MSI is not set
+# CONFIG_VENDOR_OCP is not set
+# CONFIG_VENDOR_OPENCELLULAR is not set
+# CONFIG_VENDOR_PACKARDBELL is not set
+# CONFIG_VENDOR_PCENGINES is not set
+# CONFIG_VENDOR_PINE64 is not set
+# CONFIG_VENDOR_PORTWELL is not set
+# CONFIG_VENDOR_PRODRIVE is not set
+# CONFIG_VENDOR_PROTECTLI is not set
+# CONFIG_VENDOR_PURISM is not set
+# CONFIG_VENDOR_RAZER is not set
+# CONFIG_VENDOR_RODA is not set
+# CONFIG_VENDOR_SAMSUNG is not set
+# CONFIG_VENDOR_SAPPHIRE is not set
+# CONFIG_VENDOR_SCALEWAY is not set
+# CONFIG_VENDOR_SIEMENS is not set
+# CONFIG_VENDOR_SIFIVE is not set
+# CONFIG_VENDOR_STARLABS is not set
+# CONFIG_VENDOR_SUPERMICRO is not set
+# CONFIG_VENDOR_SYSTEM76 is not set
+# CONFIG_VENDOR_TI is not set
+# CONFIG_VENDOR_UP is not set
+CONFIG_MAINBOARD_PART_NUMBER="EliteBook 8560w"
+CONFIG_MAINBOARD_VERSION="1.0"
+CONFIG_MAINBOARD_DIR="hp/snb_ivb_laptops"
+CONFIG_VGA_BIOS_ID="8086,0116"
+CONFIG_DIMM_MAX=4
+CONFIG_DIMM_SPD_SIZE=256
+CONFIG_FMDFILE=""
+# CONFIG_NO_POST is not set
+CONFIG_MAINBOARD_VENDOR="HP"
+CONFIG_CBFS_SIZE=0x7DC000
+CONFIG_CONSOLE_SERIAL=y
+CONFIG_MAX_CPUS=8
+# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
+CONFIG_POST_DEVICE=y
+CONFIG_POST_IO=y
+CONFIG_UART_FOR_CONSOLE=0
+# CONFIG_VBOOT is not set
+CONFIG_VARIANT_DIR="8560w"
+CONFIG_DEVICETREE="devicetree.cb"
+# CONFIG_VGA_BIOS is not set
+CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
+CONFIG_DRAM_RESET_GATE_GPIO=60
+CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
+CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
+CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
+CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
+CONFIG_USBDEBUG_HCD_INDEX=1
+CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
+# CONFIG_CONSOLE_POST is not set
+CONFIG_TPM_PIRQ=0x0
+CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
+CONFIG_DCACHE_RAM_BASE=0xfefe0000
+CONFIG_DCACHE_RAM_SIZE=0x20000
+CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
+CONFIG_DCACHE_BSP_STACK_SIZE=0x10000
+CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
+CONFIG_ECAM_MMCONF_BUS_NUMBER=64
+CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
+CONFIG_HAVE_INTEL_FIRMWARE=y
+CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
+CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_DRIVERS_INTEL_WIFI=y
+CONFIG_IFD_BIN_PATH="../../blobs/hp_sandybridge/ifd.bin"
+CONFIG_ME_BIN_PATH="../../blobs/hp_sandybridge/me.bin"
+CONFIG_GBE_BIN_PATH="../../blobs/hp_sandybridge/gbe.bin"
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+# CONFIG_BOARD_HP_280_G2 is not set
+# CONFIG_BOARD_HP_ABM is not set
+# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
+# CONFIG_BOARD_HP_FOLIO_9480M is not set
+# CONFIG_BOARD_HP_PAVILION_M6_1035DX is not set
+# CONFIG_BOARD_HP_2560P is not set
+# CONFIG_BOARD_HP_2570P is not set
+# CONFIG_BOARD_HP_2760P is not set
+# CONFIG_BOARD_HP_8460P is not set
+# CONFIG_BOARD_HP_8470P is not set
+CONFIG_BOARD_HP_8560W=y
+# CONFIG_BOARD_HP_8770W is not set
+# CONFIG_BOARD_HP_FOLIO_9470M is not set
+# CONFIG_BOARD_HP_PROBOOK_6360B is not set
+# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
+# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
+CONFIG_EC_HP_KBC1126_ECFW_IN_CBFS=y
+CONFIG_EC_HP_KBC1126_GPE=0x16
+CONFIG_BOARD_HP_SNB_IVB_LAPTOPS=y
+CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 8560w"
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_PCIEXP_HOTPLUG_BUSES=8
+CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
+CONFIG_PS2K_EISAID="PNP0303"
+CONFIG_PS2M_EISAID="PNP0F13"
+# CONFIG_PCIEXP_L1_SUB_STATE is not set
+# CONFIG_PCIEXP_CLK_PM is not set
+CONFIG_DRIVERS_UART_8250IO=y
+CONFIG_PRE_GRAPHICS_DELAY_MS=0
+CONFIG_HEAP_SIZE=0x4000
+CONFIG_EC_GPE_SCI=0x50
+CONFIG_BOARD_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
+CONFIG_COREBOOT_ROMSIZE_KB_8192=y
+# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
+# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
+CONFIG_COREBOOT_ROMSIZE_KB=8192
+CONFIG_ROM_SIZE=0x00800000
+CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
+CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
+CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
+# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
+# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
+CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
+# end of Mainboard
+
+CONFIG_SYSTEM_TYPE_LAPTOP=y
+
+#
+# Chipset
+#
+
+#
+# SoC
+#
+CONFIG_ARCH_ALL_STAGES_X86=y
+CONFIG_CHIPSET_DEVICETREE=""
+CONFIG_CBFS_MCACHE_SIZE=0x4000
+CONFIG_ROMSTAGE_ADDR=0x2000000
+CONFIG_VERSTAGE_ADDR=0x2000000
+CONFIG_RAMBASE=0xe00000
+CONFIG_SMM_TSEG_SIZE=0x800000
+CONFIG_SMM_RESERVED_SIZE=0x100000
+CONFIG_SMM_MODULE_STACK_SIZE=0x400
+CONFIG_CPU_SPECIFIC_OPTIONS=y
+CONFIG_S3_VGA_ROM_RUN=y
+CONFIG_SERIRQ_CONTINUOUS_MODE=y
+CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
+CONFIG_EHCI_BAR=0xfef00000
+CONFIG_CBFS_CACHE_ALIGN=8
+CONFIG_STACK_SIZE=0x1000
+CONFIG_IED_REGION_SIZE=0x400000
+CONFIG_VBT_DATA_SIZE_KB=8
+CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
+CONFIG_INTEL_GMA_BCLV_WIDTH=16
+CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
+CONFIG_INTEL_GMA_BCLM_WIDTH=16
+CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
+CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
+CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
+CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
+CONFIG_AZALIA_MAX_CODECS=4
+CONFIG_PCIEXP_ASPM=y
+CONFIG_PCIEXP_COMMON_CLOCK=y
+CONFIG_TTYS0_BASE=0x3f8
+CONFIG_TTYS0_LCS=3
+CONFIG_UART_PCI_ADDR=0x0
+
+#
+# CPU
+#
+CONFIG_CPU_INTEL_MODEL_206AX=y
+CONFIG_SSE2=y
+CONFIG_CPU_INTEL_COMMON=y
+CONFIG_ENABLE_VMX=y
+CONFIG_SET_IA32_FC_LOCK_BIT=y
+CONFIG_SET_MSR_AESNI_LOCK_BIT=y
+CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
+CONFIG_CPU_INTEL_COMMON_SMM=y
+CONFIG_MICROCODE_UPDATE_PRE_RAM=y
+CONFIG_PARALLEL_MP=y
+CONFIG_XAPIC_ONLY=y
+# CONFIG_X2APIC_ONLY is not set
+# CONFIG_X2APIC_RUNTIME is not set
+CONFIG_UDELAY_TSC=y
+CONFIG_TSC_MONOTONIC_TIMER=y
+CONFIG_TSC_SYNC_MFENCE=y
+CONFIG_LOGICAL_CPUS=y
+CONFIG_HAVE_SMI_HANDLER=y
+CONFIG_SMM_TSEG=y
+CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
+CONFIG_SMM_STUB_STACK_SIZE=0x400
+CONFIG_CPU_INFO_V2=y
+CONFIG_SMP=y
+CONFIG_MMX=y
+CONFIG_SSE=y
+CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
+CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
+CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
+# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
+# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
+
+#
+# Northbridge
+#
+CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
+CONFIG_USE_NATIVE_RAMINIT=y
+# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
+# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_REQUESTED_VOLTAGE is not set
+# CONFIG_RAMINIT_ALWAYS_ALLOW_DLL_OFF is not set
+CONFIG_RAMINIT_ENABLE_ECC=y
+
+#
+# Southbridge
+#
+CONFIG_SOUTHBRIDGE_INTEL_BD82X6X=y
+CONFIG_SOUTH_BRIDGE_OPTIONS=y
+CONFIG_HPET_MIN_TICKS=0x80
+# CONFIG_HIDE_MEI_ON_ERROR is not set
+CONFIG_PCIEXP_HOTPLUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ME=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
+CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
+CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
+# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
+CONFIG_INTEL_CHIPSET_LOCKDOWN=y
+CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
+CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
+CONFIG_RCBA_LENGTH=0x4000
+CONFIG_FIXED_SMBUS_IO_BASE=0x400
+
+#
+# Super I/O
+#
+CONFIG_SUPERIO_SMSC_LPC47N217=y
+
+#
+# Embedded Controllers
+#
+CONFIG_EC_HP_KBC1126=y
+
+#
+# Please select the following otherwise your laptop cannot be powered on.
+#
+CONFIG_KBC1126_FIRMWARE=y
+CONFIG_ECFW_PTR_ADDR=0xffffff00
+CONFIG_ECFW_PTR_SIZE=8
+CONFIG_KBC1126_FW1="../../ec/hp8560w/ec.bin.fw1"
+CONFIG_KBC1126_FW1_OFFSET=0xfffe8000
+CONFIG_KBC1126_FW2="../../ec/hp8560w/ec.bin.fw2"
+CONFIG_KBC1126_FW2_OFFSET=0xfffd0000
+
+#
+# Intel Firmware
+#
+CONFIG_HAVE_ME_BIN=y
+# CONFIG_STITCH_ME_BIN is not set
+# CONFIG_CHECK_ME is not set
+# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
+# CONFIG_USE_ME_CLEANER is not set
+CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
+CONFIG_HAVE_GBE_BIN=y
+# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
+# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
+CONFIG_UNLOCK_FLASH_REGIONS=y
+CONFIG_ARCH_X86=y
+CONFIG_ARCH_BOOTBLOCK_X86_32=y
+CONFIG_ARCH_VERSTAGE_X86_32=y
+CONFIG_ARCH_ROMSTAGE_X86_32=y
+CONFIG_ARCH_POSTCAR_X86_32=y
+CONFIG_ARCH_RAMSTAGE_X86_32=y
+CONFIG_ARCH_ALL_STAGES_X86_32=y
+CONFIG_HAVE_EXP_X86_64_SUPPORT=y
+# CONFIG_USE_EXP_X86_64_SUPPORT is not set
+CONFIG_RAMTOP=0x1000000
+CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
+CONFIG_NUM_IPI_STARTS=2
+CONFIG_PC80_SYSTEM=y
+CONFIG_HAVE_CMOS_DEFAULT=y
+CONFIG_HPET_ADDRESS=0xfed00000
+CONFIG_POSTCAR_STAGE=y
+CONFIG_BOOTBLOCK_SIMPLE=y
+# CONFIG_BOOTBLOCK_NORMAL is not set
+CONFIG_COLLECT_TIMESTAMPS_TSC=y
+CONFIG_HAVE_CF9_RESET=y
+# end of Chipset
+
+#
+# Devices
+#
+CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
+CONFIG_VGA_ROM_RUN=y
+# CONFIG_NO_GFX_INIT is not set
+CONFIG_ON_DEVICE_ROM_LOAD=y
+CONFIG_PCI_OPTION_ROM_RUN_REALMODE=y
+# CONFIG_PCI_OPTION_ROM_RUN_YABEL is not set
+
+#
+# Display
+#
+# CONFIG_FRAMEBUFFER_SET_VESA_MODE is not set
+CONFIG_VGA_TEXT_FRAMEBUFFER=y
+# end of Display
+
+CONFIG_PCI=y
+CONFIG_ECAM_MMCONF_SUPPORT=y
+CONFIG_PCIX_PLUGIN_SUPPORT=y
+CONFIG_CARDBUS_PLUGIN_SUPPORT=y
+CONFIG_AZALIA_PLUGIN_SUPPORT=y
+CONFIG_PCIEXP_PLUGIN_SUPPORT=y
+CONFIG_ECAM_MMCONF_LENGTH=0x04000000
+CONFIG_PCI_ALLOW_BUS_MASTER=y
+CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
+CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
+CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G=y
+# CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G is not set
+CONFIG_PCIEXP_HOTPLUG_IO=0x2000
+# CONFIG_EARLY_PCI_BRIDGE is not set
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+# CONFIG_INTEL_GMA_ADD_VBT is not set
+# CONFIG_SOFTWARE_I2C is not set
+CONFIG_RESOURCE_ALLOCATOR_V4=y
+# end of Devices
+
+#
+# Generic Drivers
+#
+CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
+# CONFIG_ELOG is not set
+CONFIG_CACHE_MRC_SETTINGS=y
+# CONFIG_MRC_SETTINGS_PROTECT is not set
+CONFIG_MRC_STASH_TO_CBMEM=y
+# CONFIG_SMMSTORE is not set
+CONFIG_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
+CONFIG_BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES=y
+# CONFIG_SPI_FLASH_NO_FAST_READ is not set
+CONFIG_SPI_FLASH_ADESTO=y
+CONFIG_SPI_FLASH_AMIC=y
+CONFIG_SPI_FLASH_ATMEL=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_SST=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_TPM_INIT_RAMSTAGE=y
+# CONFIG_TPM_PPI is not set
+CONFIG_DRIVERS_UART=y
+# CONFIG_DRIVERS_UART_OXPCIE is not set
+CONFIG_HAVE_USBDEBUG=y
+CONFIG_HAVE_USBDEBUG_OPTIONS=y
+# CONFIG_USBDEBUG is not set
+# CONFIG_VPD is not set
+# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
+# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
+CONFIG_INTEL_GMA_ACPI=y
+CONFIG_INTEL_GMA_OPREGION_2_0=y
+# CONFIG_DRIVERS_PS2_KEYBOARD is not set
+CONFIG_DRIVERS_MC146818=y
+# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
+CONFIG_MAINBOARD_HAS_LPC_TPM=y
+CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
+# CONFIG_DRIVERS_SIL_3114 is not set
+CONFIG_DRIVERS_WIFI_GENERIC=y
+# end of Generic Drivers
+
+#
+# Security
+#
+
+#
+# CBFS verification
+#
+# CONFIG_CBFS_VERIFICATION is not set
+# end of CBFS verification
+
+#
+# Verified Boot (vboot)
+#
+# end of Verified Boot (vboot)
+
+#
+# Trusted Platform Module
+#
+# CONFIG_NO_TPM is not set
+CONFIG_TPM1=y
+CONFIG_TPM=y
+CONFIG_MAINBOARD_HAS_TPM1=y
+# CONFIG_TPM_DEACTIVATE is not set
+# CONFIG_DEBUG_TPM is not set
+# CONFIG_TPM_RDRESP_NEED_DELAY is not set
+# CONFIG_TPM_MEASURED_BOOT is not set
+# end of Trusted Platform Module
+
+#
+# Memory initialization
+#
+CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
+CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
+# end of Memory initialization
+
+# CONFIG_INTEL_TXT is not set
+# CONFIG_STM is not set
+CONFIG_BOOTMEDIA_LOCK_NONE=y
+# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
+# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
+# CONFIG_BOOTMEDIA_SMM_BWP is not set
+# end of Security
+
+CONFIG_ACPI_HAVE_PCAT_8259=y
+CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
+CONFIG_ACPI_SOC_NVS=y
+CONFIG_HAVE_ACPI_TABLES=y
+CONFIG_BOOT_DEVICE_SPI_FLASH=y
+CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
+CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
+CONFIG_RTC=y
+
+#
+# Console
+#
+CONFIG_BOOTBLOCK_CONSOLE=y
+CONFIG_POSTCAR_CONSOLE=y
+CONFIG_SQUELCH_EARLY_SMP=y
+
+#
+# I/O mapped, 8250-compatible
+#
+
+#
+# Serial port base address = 0x3f8
+#
+# CONFIG_CONSOLE_SERIAL_921600 is not set
+# CONFIG_CONSOLE_SERIAL_460800 is not set
+# CONFIG_CONSOLE_SERIAL_230400 is not set
+CONFIG_CONSOLE_SERIAL_115200=y
+# CONFIG_CONSOLE_SERIAL_57600 is not set
+# CONFIG_CONSOLE_SERIAL_38400 is not set
+# CONFIG_CONSOLE_SERIAL_19200 is not set
+# CONFIG_CONSOLE_SERIAL_9600 is not set
+CONFIG_TTYS0_BAUD=115200
+# CONFIG_SPKMODEM is not set
+# CONFIG_CONSOLE_NE2K is not set
+CONFIG_CONSOLE_CBMEM=y
+# CONFIG_CONSOLE_SPI_FLASH is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
+# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
+CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
+CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
+# CONFIG_CMOS_POST is not set
+CONFIG_POST_DEVICE_NONE=y
+# CONFIG_POST_DEVICE_LPC is not set
+# CONFIG_POST_DEVICE_PCI_PCIE is not set
+CONFIG_POST_IO_PORT=0x80
+CONFIG_HWBASE_DEBUG_CB=y
+# end of Console
+
+CONFIG_HAVE_ACPI_RESUME=y
+CONFIG_RESUME_PATH_SAME_AS_BOOT=y
+CONFIG_HAVE_MONOTONIC_TIMER=y
+CONFIG_HAVE_OPTION_TABLE=y
+CONFIG_IOAPIC=y
+CONFIG_USE_WATCHDOG_ON_BOOT=y
+
+#
+# System tables
+#
+CONFIG_GENERATE_SMBIOS_TABLES=y
+CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
+# end of System tables
+
+#
+# Payload
+#
+CONFIG_PAYLOAD_NONE=y
+# CONFIG_PAYLOAD_ELF is not set
+# CONFIG_PAYLOAD_BOOTBOOT is not set
+# CONFIG_PAYLOAD_FILO is not set
+# CONFIG_PAYLOAD_GRUB2 is not set
+# CONFIG_PAYLOAD_LINUXBOOT is not set
+# CONFIG_PAYLOAD_SEABIOS is not set
+# CONFIG_PAYLOAD_UBOOT is not set
+# CONFIG_PAYLOAD_YABITS is not set
+# CONFIG_PAYLOAD_LINUX is not set
+# CONFIG_PAYLOAD_TIANOCORE is not set
+CONFIG_PAYLOAD_OPTIONS=""
+# CONFIG_PXE is not set
+CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
+
+#
+# Secondary Payloads
+#
+# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
+# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
+# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
+# CONFIG_TINT_SECONDARY_PAYLOAD is not set
+# end of Secondary Payloads
+# end of Payload
+
+#
+# Debugging
+#
+
+#
+# CPU Debug Settings
+#
+# CONFIG_DISPLAY_MTRRS is not set
+
+#
+# BLOB Debug Settings
+#
+
+#
+# General Debug Settings
+#
+# CONFIG_GDB_STUB is not set
+# CONFIG_FATAL_ASSERTS is not set
+# CONFIG_DEBUG_CBFS is not set
+CONFIG_HAVE_DEBUG_RAM_SETUP=y
+# CONFIG_DEBUG_RAM_SETUP is not set
+CONFIG_HAVE_DEBUG_SMBUS=y
+# CONFIG_DEBUG_SMBUS is not set
+# CONFIG_DEBUG_SMI is not set
+# CONFIG_DEBUG_MALLOC is not set
+# CONFIG_DEBUG_CONSOLE_INIT is not set
+# CONFIG_REALMODE_DEBUG is not set
+# CONFIG_DEBUG_SPI_FLASH is not set
+# CONFIG_DEBUG_BOOT_STATE is not set
+# CONFIG_DEBUG_ADA_CODE is not set
+CONFIG_HAVE_EM100_SUPPORT=y
+# CONFIG_EM100 is not set
+# end of Debugging
+
+CONFIG_WARNINGS_ARE_ERRORS=y
+CONFIG_MAX_REBOOT_CNT=3
+CONFIG_RELOCATABLE_MODULES=y
+CONFIG_HAVE_BOOTBLOCK=y
+CONFIG_HAVE_ROMSTAGE=y
+CONFIG_HAVE_RAMSTAGE=y
--- a/resources/coreboot/hp_8560w_cherrypick/board.cfg
+++ b/resources/coreboot/hp_8560w_cherrypick/board.cfg
+cbtree="hp_8560w_cherrypick"
+romtype="normal"
+cbrevision="9fc5166ca74568bf292a8f9404fd5c56cce154bf"
+arch="x86_64"
--- a/resources/coreboot/hp_8560w_cherrypick/patches/0001-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch
+++ b/resources/coreboot/hp_8560w_cherrypick/patches/0001-mb-hp-Add-Elitebook-8560w-as-an-HP-Sandy-Ivy-Bridge-.patch
+From 6b382ea8ac5f1e0ac5fd772adce394daf150a7e6 Mon Sep 17 00:00:00 2001
+From: Iru Cai <mytbk920423@gmail.com>
+Date: Tue, 5 Mar 2019 16:27:36 +0800
+Subject: [PATCH 1/2] mb/hp: Add Elitebook 8560w as an HP Sandy/Ivy Bridge
+ laptop variant
+
+Change-Id: I15181792b1efa45a2a94d78e43c6257da1acf950
+Signed-off-by: Iru Cai <mytbk920423@gmail.com>
+---
+ Documentation/mainboard/hp/8560w.md           |  82 +++++++
+ Documentation/mainboard/hp/8560w_flash.webp   | Bin 0 -> 51432 bytes
+ Documentation/mainboard/index.md              |   1 +
+ src/mainboard/hp/snb_ivb_laptops/Kconfig      |   3 +
+ src/mainboard/hp/snb_ivb_laptops/Kconfig.name |  11 +
+ .../variants/8560w/board_info.txt             |   7 +
+ .../variants/8560w/early_init.c               |  46 ++++
+ .../hp/snb_ivb_laptops/variants/8560w/gpio.c  | 224 ++++++++++++++++++
+ .../snb_ivb_laptops/variants/8560w/hda_verb.c |  25 ++
+ .../variants/8560w/overridetree.cb            |  54 +++++
+ 10 files changed, 453 insertions(+)
+ create mode 100644 Documentation/mainboard/hp/8560w.md
+ create mode 100644 Documentation/mainboard/hp/8560w_flash.webp
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
+ create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
+
+diff --git a/Documentation/mainboard/hp/8560w.md b/Documentation/mainboard/hp/8560w.md
+new file mode 100644
+index 0000000000..d64e51e5b4
+--- /dev/null
+++ b/Documentation/mainboard/hp/8560w.md
+@@ -0,0 +1,82 @@
+# HP EliteBook 8560w
+
+This page describes how to run coreboot on the [HP EliteBook 8560w].
+
+## Required proprietary blobs
+
+- Intel Firmware Descriptor, ME and GbE firmware
+- EC: please read [HP Laptops with KBC1126 Embedded Controller](hp_kbc1126_laptops)
+
+## Flashing instructions
+
+HP EliteBook 8560w has an 8MB SOIC-8 flash chip on the bottom of the
+mainboard. You just need to remove the service cover, and use an SOIC-8
+clip to read and flash the chip.
+
+![8560w_chip_location](8560w_flash.webp)
+
+```eval_rst
++---------------------+------------+
+| Type                | Value      |
++=====================+============+
+| Socketed flash      | no         |
++---------------------+------------+
+| Model               | MX25L6406E |
++---------------------+------------+
+| Size                | 8 MiB      |
++---------------------+------------+
+| Package             | SOIC-8     |
++---------------------+------------+
+| Write protection    | no         |
++---------------------+------------+
+| Dual BIOS feature   | no         |
++---------------------+------------+
+| In circuit flashing | yes        |
++---------------------+------------+
+| Internal flashing   | yes        |
++---------------------+------------+
+```
+
+## Untested
+
+- mainboards with 4 memory slots
+
+## Working
+
+- i7-2720QM, 8G+8G
+- Arch Linux boot from SeaBIOS payload
+- EHCI debug: the port is beside the eSATA port
+- SATA
+- eSATA
+- USB2 and USB3
+- keyboard
+- Gigabit Ethernet
+- WLAN
+- WWAN
+- VGA and DisplayPort
+- audio
+- EC ACPI
+- Using `me_cleaner`
+- dock: PS/2 keyboard, USB, DisplayPort
+- TPM
+- S3 suspend/resume
+
+## Technology
+
+```eval_rst
++------------------+--------------------------------------------------+
+| Northbridge      | :doc:`../../northbridge/intel/sandybridge/index` |
++------------------+--------------------------------------------------+
+| Southbridge      | bd82x6x                                          |
++------------------+--------------------------------------------------+
+| CPU              | model_206ax                                      |
++------------------+--------------------------------------------------+
+| Super I/O        | SMSC LPC47n217                                   |
++------------------+--------------------------------------------------+
+| EC               | SMSC KBC1126                                     |
++------------------+--------------------------------------------------+
+| Coprocessor      | Intel Management Engine                          |
++------------------+--------------------------------------------------+
+```
+
+[HP EliteBook 8560w]: https://support.hp.com/us-en/product/hp-elitebook-8560w-mobile-workstation/5071171
+diff --git a/Documentation/mainboard/hp/8560w_flash.webp b/Documentation/mainboard/hp/8560w_flash.webp
+new file mode 100644
+index 0000000000000000000000000000000000000000..b8295bc6e920a4c59c4282e419200569672e8267
+GIT binary patch
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+z2RI(|#vgy!59LfmAxA=SRJ^rWZU8y`=l;qn{&Szss*Zf~-+2E3&_y63C{I1<jJfMm
+zo((q@M3u_+qi_EJuBN~yntD(KUSB+s^``6u)Zh<J)PxN5pkyL2qvaSh74Pd(o|FIx
+z&w4;YtF^E(gVw!g;eF<p2ZygMF7+6#W_yt$hH$3<3?6vvURQyUP9)K5l^HbdkEDg(
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+G|JeY!zvB4-
+
+literal 0
+HcmV?d00001
+
+diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
+index 67af86f058..1526e572bc 100644
+--- a/Documentation/mainboard/index.md
+++ b/Documentation/mainboard/index.md
+@@ -77,6 +77,7 @@ The boards in this section are not real mainboards, but emulators.
+ - [HP Laptops with KBC1126 EC](hp/hp_kbc1126_laptops.md)
+ - [HP Sure Start](hp/hp_sure_start.md)
+ - [EliteBook 2560p](hp/2560p.md)
+- [EliteBook 8560w](hp/8560w.md)
+ - [EliteBook 8760w](hp/8760w.md)
+ - [EliteBook Folio 9480m](hp/folio_9480m.md)
+ 
+diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig b/src/mainboard/hp/snb_ivb_laptops/Kconfig
+index d7e2a97ae9..78e06ba8da 100644
+--- a/src/mainboard/hp/snb_ivb_laptops/Kconfig
+++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig
+@@ -25,6 +25,7 @@ config VARIANT_DIR
+ 	default "2760p"          if BOARD_HP_2760P
+ 	default "8460p"          if BOARD_HP_8460P
+ 	default "8470p"          if BOARD_HP_8470P
+	default "8560w"          if BOARD_HP_8560W
+ 	default "8770w"          if BOARD_HP_8770W
+ 	default "folio_9470m"    if BOARD_HP_FOLIO_9470M
+ 	default "probook_6360b"  if BOARD_HP_PROBOOK_6360B
+@@ -36,6 +37,7 @@ config MAINBOARD_PART_NUMBER
+ 	default "EliteBook 2760p"          if BOARD_HP_2760P
+ 	default "EliteBook 8460p"          if BOARD_HP_8460P
+ 	default "EliteBook 8470p"          if BOARD_HP_8470P
+	default "EliteBook 8560w"          if BOARD_HP_8560W
+ 	default "EliteBook 8770w"          if BOARD_HP_8770W
+ 	default "EliteBook Folio 9470m"    if BOARD_HP_FOLIO_9470M
+ 	default "ProBook 6360b"            if BOARD_HP_PROBOOK_6360B
+@@ -56,6 +58,7 @@ config USBDEBUG_HCD_INDEX
+ 	default 1 if BOARD_HP_2760P
+ 	default 1 if BOARD_HP_8460P
+ 	default 2 if BOARD_HP_8470P
+	default 1 if BOARD_HP_8560W
+ 	default 2 if BOARD_HP_8770W
+ 	default 0 if BOARD_HP_FOLIO_9470M
+ 	default 1 if BOARD_HP_PROBOOK_6360B # FIXME: check this
+diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
+index 85f95b27bf..c469b8c559 100644
+--- a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
+++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
+@@ -58,6 +58,17 @@ config BOARD_HP_8470P
+ 	select SOUTHBRIDGE_INTEL_C216
+ 	select SUPERIO_SMSC_LPC47N217
+ 
+config BOARD_HP_8560W
+	bool "EliteBook 8560w"
+
+	select BOARD_HP_SNB_IVB_LAPTOPS
+	select BOARD_ROMSIZE_KB_8192
+	select MAINBOARD_USES_IFD_GBE_REGION
+	select SOUTHBRIDGE_INTEL_BD82X6X
+	select SUPERIO_SMSC_LPC47N217
+	select MAINBOARD_HAS_LPC_TPM
+	select MAINBOARD_HAS_TPM1
+
+ config BOARD_HP_8770W
+ 	bool "EliteBook 8770w"
+ 
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
+new file mode 100644
+index 0000000000..af1e296eb3
+--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
+@@ -0,0 +1,7 @@
+Category: laptop
+Board URL: https://support.hp.com/us-en/product/hp-elitebook-8560w-mobile-workstation/5071171
+ROM package: SOIC-8
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: n
+Release year: 2011
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
+new file mode 100644
+index 0000000000..c00cbeeb95
+--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
+@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <bootblock_common.h>
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <northbridge/intel/sandybridge/raminit_native.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+#include <superio/smsc/lpc47n217/lpc47n217.h>
+#include <ec/hp/kbc1126/ec.h>
+
+#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1)
+
+const struct southbridge_usb_port mainboard_usb_ports[] = {
+	{ 1, 1, 0 }, /* USB0 */
+	{ 1, 1, 0 }, /* USB1 */
+	{ 1, 1, 1 }, /* eSATA */
+	{ 1, 1, 1 }, /* camera */
+	{ 0, 0, 2 },
+	{ 1, 0, 2 }, /* bluetooth */
+	{ 0, 0, 3 },
+	{ 1, 0, 3 },
+	{ 0, 1, 4 },
+	{ 1, 1, 4 }, /* WWAN */
+	{ 1, 0, 5 },
+	{ 1, 0, 5 }, /* dock */
+	{ 1, 0, 6 },
+	{ 1, 0, 6 },
+};
+
+void bootblock_mainboard_early_init(void)
+{
+	lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
+	kbc1126_enter_conf();
+	kbc1126_mailbox_init();
+	kbc1126_kbc_init();
+	kbc1126_ec_init();
+	kbc1126_pm1_init();
+	kbc1126_exit_conf();
+}
+
+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
+{
+	read_spd(&spd[0], 0x50, id_only);
+	read_spd(&spd[1], 0x51, id_only);
+	read_spd(&spd[2], 0x52, id_only);
+	read_spd(&spd[3], 0x53, id_only);
+}
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
+new file mode 100644
+index 0000000000..560d668d6f
+--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
+@@ -0,0 +1,224 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <southbridge/intel/common/gpio.h>
+
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
+	.gpio0 = GPIO_MODE_GPIO,
+	.gpio1 = GPIO_MODE_GPIO,
+	.gpio2 = GPIO_MODE_GPIO,
+	.gpio3 = GPIO_MODE_GPIO,
+	.gpio4 = GPIO_MODE_GPIO,
+	.gpio5 = GPIO_MODE_NATIVE,
+	.gpio6 = GPIO_MODE_GPIO,
+	.gpio7 = GPIO_MODE_GPIO,
+	.gpio8 = GPIO_MODE_GPIO,
+	.gpio9 = GPIO_MODE_NATIVE,
+	.gpio10 = GPIO_MODE_GPIO,
+	.gpio11 = GPIO_MODE_GPIO,
+	.gpio12 = GPIO_MODE_NATIVE,
+	.gpio13 = GPIO_MODE_GPIO,
+	.gpio14 = GPIO_MODE_GPIO,
+	.gpio15 = GPIO_MODE_GPIO,
+	.gpio16 = GPIO_MODE_GPIO,
+	.gpio17 = GPIO_MODE_GPIO,
+	.gpio18 = GPIO_MODE_NATIVE,
+	.gpio19 = GPIO_MODE_GPIO,
+	.gpio20 = GPIO_MODE_NATIVE,
+	.gpio21 = GPIO_MODE_GPIO,
+	.gpio22 = GPIO_MODE_GPIO,
+	.gpio23 = GPIO_MODE_GPIO,
+	.gpio24 = GPIO_MODE_GPIO,
+	.gpio25 = GPIO_MODE_NATIVE,
+	.gpio26 = GPIO_MODE_NATIVE,
+	.gpio27 = GPIO_MODE_GPIO,
+	.gpio28 = GPIO_MODE_GPIO,
+	.gpio29 = GPIO_MODE_GPIO,
+	.gpio30 = GPIO_MODE_NATIVE,
+	.gpio31 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
+	.gpio0 = GPIO_DIR_OUTPUT,
+	.gpio1 = GPIO_DIR_INPUT,
+	.gpio2 = GPIO_DIR_INPUT,
+	.gpio3 = GPIO_DIR_INPUT,
+	.gpio4 = GPIO_DIR_INPUT,
+	.gpio6 = GPIO_DIR_INPUT,
+	.gpio7 = GPIO_DIR_INPUT,
+	.gpio8 = GPIO_DIR_INPUT,
+	.gpio10 = GPIO_DIR_INPUT,
+	.gpio11 = GPIO_DIR_OUTPUT,
+	.gpio13 = GPIO_DIR_INPUT,
+	.gpio14 = GPIO_DIR_INPUT,
+	.gpio15 = GPIO_DIR_INPUT,
+	.gpio16 = GPIO_DIR_INPUT,
+	.gpio17 = GPIO_DIR_OUTPUT,
+	.gpio19 = GPIO_DIR_INPUT,
+	.gpio21 = GPIO_DIR_INPUT,
+	.gpio22 = GPIO_DIR_OUTPUT,
+	.gpio23 = GPIO_DIR_INPUT,
+	.gpio24 = GPIO_DIR_OUTPUT,
+	.gpio27 = GPIO_DIR_OUTPUT,
+	.gpio28 = GPIO_DIR_OUTPUT,
+	.gpio29 = GPIO_DIR_OUTPUT,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
+	.gpio0 = GPIO_LEVEL_LOW,
+	.gpio11 = GPIO_LEVEL_LOW,
+	.gpio17 = GPIO_LEVEL_HIGH,
+	.gpio22 = GPIO_LEVEL_HIGH,
+	.gpio24 = GPIO_LEVEL_HIGH,
+	.gpio27 = GPIO_LEVEL_LOW,
+	.gpio28 = GPIO_LEVEL_LOW,
+	.gpio29 = GPIO_LEVEL_HIGH,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
+	.gpio24 = GPIO_RESET_RSMRST,
+	.gpio30 = GPIO_RESET_RSMRST,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
+	.gpio1 = GPIO_INVERT,
+	.gpio3 = GPIO_INVERT,
+	.gpio6 = GPIO_INVERT,
+	.gpio7 = GPIO_INVERT,
+	.gpio10 = GPIO_INVERT,
+	.gpio13 = GPIO_INVERT,
+	.gpio14 = GPIO_INVERT,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
+	.gpio32 = GPIO_MODE_NATIVE,
+	.gpio33 = GPIO_MODE_GPIO,
+	.gpio34 = GPIO_MODE_GPIO,
+	.gpio35 = GPIO_MODE_GPIO,
+	.gpio36 = GPIO_MODE_NATIVE,
+	.gpio37 = GPIO_MODE_GPIO,
+	.gpio38 = GPIO_MODE_GPIO,
+	.gpio39 = GPIO_MODE_GPIO,
+	.gpio40 = GPIO_MODE_NATIVE,
+	.gpio41 = GPIO_MODE_NATIVE,
+	.gpio42 = GPIO_MODE_NATIVE,
+	.gpio43 = GPIO_MODE_NATIVE,
+	.gpio44 = GPIO_MODE_GPIO,
+	.gpio45 = GPIO_MODE_NATIVE,
+	.gpio46 = GPIO_MODE_GPIO,
+	.gpio47 = GPIO_MODE_NATIVE,
+	.gpio48 = GPIO_MODE_GPIO,
+	.gpio49 = GPIO_MODE_GPIO,
+	.gpio50 = GPIO_MODE_GPIO,
+	.gpio51 = GPIO_MODE_GPIO,
+	.gpio52 = GPIO_MODE_GPIO,
+	.gpio53 = GPIO_MODE_GPIO,
+	.gpio54 = GPIO_MODE_GPIO,
+	.gpio55 = GPIO_MODE_GPIO,
+	.gpio56 = GPIO_MODE_NATIVE,
+	.gpio57 = GPIO_MODE_GPIO,
+	.gpio58 = GPIO_MODE_NATIVE,
+	.gpio59 = GPIO_MODE_NATIVE,
+	.gpio60 = GPIO_MODE_GPIO,
+	.gpio61 = GPIO_MODE_GPIO,
+	.gpio62 = GPIO_MODE_NATIVE,
+	.gpio63 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
+	.gpio33 = GPIO_DIR_OUTPUT,
+	.gpio34 = GPIO_DIR_INPUT,
+	.gpio35 = GPIO_DIR_OUTPUT,
+	.gpio37 = GPIO_DIR_OUTPUT,
+	.gpio38 = GPIO_DIR_INPUT,
+	.gpio39 = GPIO_DIR_INPUT,
+	.gpio44 = GPIO_DIR_INPUT,
+	.gpio46 = GPIO_DIR_INPUT,
+	.gpio48 = GPIO_DIR_INPUT,
+	.gpio49 = GPIO_DIR_OUTPUT,
+	.gpio50 = GPIO_DIR_INPUT,
+	.gpio51 = GPIO_DIR_INPUT,
+	.gpio52 = GPIO_DIR_INPUT,
+	.gpio53 = GPIO_DIR_OUTPUT,
+	.gpio54 = GPIO_DIR_INPUT,
+	.gpio55 = GPIO_DIR_INPUT,
+	.gpio57 = GPIO_DIR_OUTPUT,
+	.gpio60 = GPIO_DIR_OUTPUT,
+	.gpio61 = GPIO_DIR_OUTPUT,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
+	.gpio33 = GPIO_LEVEL_LOW,
+	.gpio35 = GPIO_LEVEL_LOW,
+	.gpio37 = GPIO_LEVEL_LOW,
+	.gpio49 = GPIO_LEVEL_LOW,
+	.gpio53 = GPIO_LEVEL_HIGH,
+	.gpio57 = GPIO_LEVEL_LOW,
+	.gpio60 = GPIO_LEVEL_HIGH,
+	.gpio61 = GPIO_LEVEL_HIGH,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
+	.gpio64 = GPIO_MODE_NATIVE,
+	.gpio65 = GPIO_MODE_NATIVE,
+	.gpio66 = GPIO_MODE_NATIVE,
+	.gpio67 = GPIO_MODE_NATIVE,
+	.gpio68 = GPIO_MODE_GPIO,
+	.gpio69 = GPIO_MODE_GPIO,
+	.gpio70 = GPIO_MODE_GPIO,
+	.gpio71 = GPIO_MODE_GPIO,
+	.gpio72 = GPIO_MODE_GPIO,
+	.gpio73 = GPIO_MODE_GPIO,
+	.gpio74 = GPIO_MODE_GPIO,
+	.gpio75 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
+	.gpio68 = GPIO_DIR_OUTPUT,
+	.gpio69 = GPIO_DIR_INPUT,
+	.gpio70 = GPIO_DIR_OUTPUT,
+	.gpio71 = GPIO_DIR_OUTPUT,
+	.gpio72 = GPIO_DIR_OUTPUT,
+	.gpio73 = GPIO_DIR_OUTPUT,
+	.gpio74 = GPIO_DIR_OUTPUT,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
+	.gpio68 = GPIO_LEVEL_HIGH,
+	.gpio70 = GPIO_LEVEL_HIGH,
+	.gpio71 = GPIO_LEVEL_HIGH,
+	.gpio72 = GPIO_LEVEL_LOW,
+	.gpio73 = GPIO_LEVEL_HIGH,
+	.gpio74 = GPIO_LEVEL_HIGH,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
+};
+
+const struct pch_gpio_map mainboard_gpio_map = {
+	.set1 = {
+		.mode		= &pch_gpio_set1_mode,
+		.direction	= &pch_gpio_set1_direction,
+		.level		= &pch_gpio_set1_level,
+		.blink		= &pch_gpio_set1_blink,
+		.invert		= &pch_gpio_set1_invert,
+		.reset		= &pch_gpio_set1_reset,
+	},
+	.set2 = {
+		.mode		= &pch_gpio_set2_mode,
+		.direction	= &pch_gpio_set2_direction,
+		.level		= &pch_gpio_set2_level,
+		.reset		= &pch_gpio_set2_reset,
+	},
+	.set3 = {
+		.mode		= &pch_gpio_set3_mode,
+		.direction	= &pch_gpio_set3_direction,
+		.level		= &pch_gpio_set3_level,
+		.reset		= &pch_gpio_set3_reset,
+	},
+};
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
+new file mode 100644
+index 0000000000..2f5469fc84
+--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
+@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+	0x111d7605, /* Codec Vendor / Device ID: IDT */
+	0x103c1631, /* Subsystem ID */
+
+	11,		/* Number of 4 dword sets */
+	AZALIA_SUBVENDOR(0, 0x103c1631),
+	AZALIA_PIN_CFG(0, 0x0a, 0x40f000f0),
+	AZALIA_PIN_CFG(0, 0x0b, 0x0421401f),
+	AZALIA_PIN_CFG(0, 0x0c, 0x04a11020),
+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
+	AZALIA_PIN_CFG(0, 0x0e, 0x40f000f0),
+	AZALIA_PIN_CFG(0, 0x0f, 0x40f000f0),
+	AZALIA_PIN_CFG(0, 0x10, 0x40f000f0),
+	AZALIA_PIN_CFG(0, 0x11, 0x90a60130),
+	AZALIA_PIN_CFG(0, 0x1f, 0x40f000f0),
+	AZALIA_PIN_CFG(0, 0x20, 0x40f000f0),
+};
+
+const u32 pc_beep_verbs[0] = {};
+
+AZALIA_ARRAY_SIZES;
+diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
+new file mode 100644
+index 0000000000..bf4823ed2b
+--- /dev/null
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
+@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+chip northbridge/intel/sandybridge
+	device domain 0x0 on
+		subsystemid 0x103c 0x1631 inherit
+		device pci 01.0 on end # PCIe Bridge for discrete graphics
+		device pci 02.0 off end # Internal graphics
+
+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
+			register "docking_supported" = "0"
+			register "gen1_dec" = "0x007c0201"
+			register "gen2_dec" = "0x000c0101"
+			register "gen3_dec" = "0x00fcfe01"
+			register "gen4_dec" = "0x000402e9"
+			register "gpi6_routing" = "2"
+			register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
+			# HDD(0), ODD(1), eSATA(4)
+			register "sata_port_map" = "0x3b"
+
+			device pci 1c.0 on end # PCIe Port #1, WWAN
+			device pci 1c.1 on end # PCIe Port #2, ExpressCard
+			device pci 1c.2 on end # PCIe Port #3, SD/MMC
+			device pci 1c.3 on end # PCIe Port #4, WLAN
+			device pci 1c.4 off end # PCIe Port #5
+			device pci 1c.5 off end # PCIe Port #6
+			device pci 1c.6 off end # PCIe Port #7
+			device pci 1c.7 on end # PCIe Port #8, NEC USB 3.0 Host Controller
+			device pci 1f.0 on	# LPC bridge
+				chip ec/hp/kbc1126
+					register "ec_data_port" = "0x60"
+					register "ec_cmd_port" = "0x64"
+					register "ec_ctrl_reg" = "0xca"
+					register "ec_fan_ctrl_value" = "0x6b"
+					device pnp ff.1 off end
+				end
+				chip superio/smsc/lpc47n217
+					device pnp 4e.3 on	# Parallel
+						io  0x60 = 0x378
+						irq 0x70 = 7
+					end
+					device pnp 4e.4 on	# COM1
+						io  0x60 = 0x3f8
+						irq 0x70 = 4
+					end
+					device pnp 4e.5 off end	# COM2
+				end
+
+				chip drivers/pc80/tpm
+					device pnp 0c31.0 on end
+				end
+			end
+		end
+	end
+end
+-- 
+2.39.2
+
--- a/resources/coreboot/hp_8560w_cherrypick/patches/0002-coreboot-default-fix-crossgcc-build.patch
+++ b/resources/coreboot/hp_8560w_cherrypick/patches/0002-coreboot-default-fix-crossgcc-build.patch
+From 5bfcf6e8cb17eaa2aa4ed2cd07c1e3a9776ed82f Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sat, 19 Nov 2022 03:30:34 +0000
+Subject: [PATCH 2/2] coreboot/default: fix crossgcc build
+
+patch copied from
+coreboot f9b5665d280faa35c6b41fe0c48a9e9e1afd634b
+---
+ util/crossgcc/patches/gcc-11.2.0_gnat.patch | 32 ++++++++++++++++++++-
+ 1 file changed, 31 insertions(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/patches/gcc-11.2.0_gnat.patch b/util/crossgcc/patches/gcc-11.2.0_gnat.patch
+index 2d7cecee24..c22cec45d0 100644
+--- a/util/crossgcc/patches/gcc-11.2.0_gnat.patch
+++ b/util/crossgcc/patches/gcc-11.2.0_gnat.patch
+@@ -5,7 +5,37 @@
+  
+  # Extra flags to pass to recursive makes.
+ -COMMON_ADAFLAGS= -gnatpg
+-+COMMON_ADAFLAGS= -gnatpg -gnatwGUR
++COMMON_ADAFLAGS= -gnatpg -gnatwn
+  ifeq ($(TREECHECKING),)
+  CHECKING_ADAFLAGS=
+  else
+diff -Nurp gcc-11.2.0/gcc/ada/gcc-interface/Make-lang.in gcc-11.2.0.new/gcc/ada/gcc-interface/Make-lang.in
+--- gcc-11.2.0/gcc/ada/gcc-interface/Make-lang.in	2022-06-03 00:31:57.993273717 +0200
++++ gcc-11.2.0.new/gcc/ada/gcc-interface/Make-lang.in	2022-06-03 00:30:50.214166847 +0200
+@@ -334,6 +334,7 @@ GNAT_ADA_OBJS =	\
+  ada/hostparm.o	\
+  ada/impunit.o	\
+  ada/inline.o	\
++ ada/libgnat/i-c.o	\
+  ada/libgnat/interfac.o	\
+  ada/itypes.o	\
+  ada/krunch.o	\
+@@ -364,7 +365,10 @@ GNAT_ADA_OBJS =	\
+  ada/rtsfind.o	\
+  ada/libgnat/s-addope.o	\
+  ada/libgnat/s-addima.o \
++ ada/libgnat/s-aotase.o	\
+  ada/libgnat/s-assert.o	\
++ ada/libgnat/s-atoope.o	\
++ ada/libgnat/s-atopri.o	\
+  ada/libgnat/s-bitops.o	\
+  ada/libgnat/s-carun8.o	\
+  ada/libgnat/s-casuti.o	\
+@@ -548,6 +552,7 @@ GNATBIND_OBJS = \
+  ada/hostparm.o   \
+  ada/init.o       \
+  ada/initialize.o \
++ ada/libgnat/i-c.o        \
+  ada/libgnat/interfac.o   \
+  ada/krunch.o     \
+  ada/lib.o        \
+-- 
+2.39.2
+
--- a/resources/coreboot/hp_8560w_cherrypick/patches/test.patch
+++ b/resources/coreboot/hp_8560w_cherrypick/patches/test.patch
+From d89a5c66a0150bb6a2e82c685915b2c8a44cb9ed Mon Sep 17 00:00:00 2001
+From: Leah Rowe <leah@libreboot.org>
+Date: Sat, 19 Nov 2022 03:30:34 +0000
+Subject: [PATCH 14/17] coreboot/default: fix crossgcc build
+
+patch copied from
+coreboot f9b5665d280faa35c6b41fe0c48a9e9e1afd634b
+---
+ util/crossgcc/patches/gcc-11.2.0_gnat.patch | 32 ++++++++++++++++++++-
+ 1 file changed, 31 insertions(+), 1 deletion(-)
+
+diff --git a/util/crossgcc/patches/gcc-11.2.0_gnat.patch b/util/crossgcc/patches/gcc-11.2.0_gnat.patch
+index 2d7cecee24..c22cec45d0 100644
+--- a/util/crossgcc/patches/gcc-11.2.0_gnat.patch
+++ b/util/crossgcc/patches/gcc-11.2.0_gnat.patch
+@@ -5,7 +5,37 @@
+  
+  # Extra flags to pass to recursive makes.
+ -COMMON_ADAFLAGS= -gnatpg
+-+COMMON_ADAFLAGS= -gnatpg -gnatwGUR
++COMMON_ADAFLAGS= -gnatpg -gnatwn
+  ifeq ($(TREECHECKING),)
+  CHECKING_ADAFLAGS=
+  else
+diff -Nurp gcc-11.2.0/gcc/ada/gcc-interface/Make-lang.in gcc-11.2.0.new/gcc/ada/gcc-interface/Make-lang.in
+--- gcc-11.2.0/gcc/ada/gcc-interface/Make-lang.in	2022-06-03 00:31:57.993273717 +0200
++++ gcc-11.2.0.new/gcc/ada/gcc-interface/Make-lang.in	2022-06-03 00:30:50.214166847 +0200
+@@ -334,6 +334,7 @@ GNAT_ADA_OBJS =	\
+  ada/hostparm.o	\
+  ada/impunit.o	\
+  ada/inline.o	\
++ ada/libgnat/i-c.o	\
+  ada/libgnat/interfac.o	\
+  ada/itypes.o	\
+  ada/krunch.o	\
+@@ -364,7 +365,10 @@ GNAT_ADA_OBJS =	\
+  ada/rtsfind.o	\
+  ada/libgnat/s-addope.o	\
+  ada/libgnat/s-addima.o \
++ ada/libgnat/s-aotase.o	\
+  ada/libgnat/s-assert.o	\
++ ada/libgnat/s-atoope.o	\
++ ada/libgnat/s-atopri.o	\
+  ada/libgnat/s-bitops.o	\
+  ada/libgnat/s-carun8.o	\
+  ada/libgnat/s-casuti.o	\
+@@ -548,6 +552,7 @@ GNATBIND_OBJS = \
+  ada/hostparm.o   \
+  ada/init.o       \
+  ada/initialize.o \
++ ada/libgnat/i-c.o        \
+  ada/libgnat/interfac.o   \
+  ada/krunch.o     \
+  ada/lib.o        \
+-- 
+2.25.1
+